Please use this identifier to cite or link to this item: http://hdl.handle.net/20.500.12188/16639
Title: Performance Evaluation of RISC-Based Memory-Centric Processor Architecture
Authors: Efnusheva, Danijela
Issue Date: 2020
Publisher: Springer International Publishing
Conference: Advances in Intelligent Systems and Computing
URI: http://hdl.handle.net/20.500.12188/16639
DOI: 10.1007/978-3-030-51974-2_13
Appears in Collections:Faculty of Electrical Engineering and Information Technologies: Book Chapters

Show full item record

Page view(s)

69
checked on Jul 24, 2024

Google ScholarTM

Check

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.